/ OPEN POSITION

ASIC Engineering Lead

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Who we are

Silicon Quantum Computing Pty Limited (SQC) is at the forefront of global efforts to build a commercial-scale quantum computer and bring quantum computing to market.Established in May 2017, it is the world’s first atomic precision manufacturing company focused on delivering the highest quality qubits and commercial outcomes as they scale. SQC has significant backing from Telstra, the Commonwealth Bank of Australia, UNSW Sydney, and the Australian Federal and New South Wales governments. With AU$283m in funding to date and a highly integrated team of engineers, SQC has developed a full-stack quantum computer in-house and is capable of rapid iteration and product deployment at speed.

Position Summary

This position will be in one of Australia’s leading research teams conducting world-leading research in atomic electronics and quantum computing with the specific aim of building a quantum computer based on atom-qubits in silicon. Silicon Quantum Computing is an Australian research and development company, working hard to make quantum computers a reality.

We are seeking a highly experienced ASIC/CMOS mixed-signal design engineer with deep expertise in analogue design to join our team. The role is an end-to-end development of mixed-signal ASICs, contributing from architecture through to tapeout.

This is a senior technical role requiring a strong command of analogue and mixed-signal design techniques, hands-on experience with industry-standard EDA tools (Cadence, Synopsys, and/or Siemens), and a proven track record of delivering tapeout-ready silicon in commercial applications.

The ASIC/CMOS Engineering Lead reports to the Chief Executive Officer and works closely with the hardware and measurement teams.

Responsibilities

  • Lead or contribute to the analogue design of mixed-signal integrated circuits including blocks such as ADCs, DACs, LNAs, PLLs, filters, and other precision analogue components.
  • Participate in system architecture definition and feasibility analysis.
  • Execute the entire ASIC design flow, from schematic capture and simulation to layout, verification, sign-off, and tapeout.
  • Perform detailed design reviews, verification, and post-layout simulations.
  • Work collaboratively with foundries and EDA vendors to resolve process-related or tool-related issues.
  • Maintain up-to-date knowledge of process technologies, best practices, and emerging tools.
  • Cooperate with all health & safety policies and procedures of SQC.

Selection Criteria

  • 10+ years of experience in analogue and mixed-signal CMOS/ASIC design.
  • Demonstrated tapeout experience with full life-cycle involvement (spec to silicon).
  • Expertise in analogue design fundamentals, including noise analysis, stability, matching, and layout-dependent effects.
  • Fluency with EDA tools: One or more: Cadence Virtuoso, Synopsys Custom Designer, and/or Siemens EDA platforms.
  • Familiarity with analogue layout and ability to work closely with layout engineers to guide floorplanning and optimization.
  • Experience with scripting for automation is a plus.
  • Strong communication, documentation, and cross-functional collaboration skills.
  • Knowledge of health & safety responsibilities and commitment to attending relevant health and safety training.
  • Experience with FinFET, FDSOI, or BiCMOS processes.
  • Knowledge of RF, high-speed interfaces, or sensor interface circuits.
  • Prior experience in working with custom PDKs or developing IP blocks for reuse.
  • Experience with lab evaluation and characterization of silicon is a strong plus.

Pre-employment checks required for this position

  • Verification of qualifications
  • Background checks

If this role is for you

send your CV to careers@sqc.com.au.
Please include a cover letter addressing the selection criteria.